Thursday, February 09, 2023

Saving Power, Money, and Improving Cyber Security Using High Frequency Digital Noise

Parent Category: 2016 HFE

By Michael Hopkins

Much energy is wasted in modern computing, a portion radiating into free space. In the attempt to keep digital supply lines clean from the noise effects of supply line voltage perturbations, created by high frequency surges of overlap current in CMOS based logic (see Figure 2), much of this current is passed to ground via system decoupling/reservoir capacitors. This current is generally ignored by system, PCB and chip designers, and is treated as “throw away” or ignored  current and energy. Unless there is a ground loop or EMI problem in a system, this current is discarded and ignored. 

Overlap current will not be ignored, however. Not only is it the source of dynamic power dissipation in systems; it shows up spectrally, radiating from power planes in systems, pcbs and chips, giving away important system information, allowing hackers to gain access and compromise data. 

CMOS logic based overlap current flow is the primary source of dynamic power dissipation in digital and switching systems.  If even a small portion of this current can be recovered and reused, system power dissipation is reduced and data is more secure.

CurrentRF has invented a technology and methodology that spans the system, PCB, and IC levels of integration (see Figure 1), and captures and recycles a portion of the above mentioned overlap currents,  as shown in Figure 3. The company has developed an IC and IP that has an input impedance low enough to be inserted in series with the ground connection of common PCB and on-chip reservoir capacitors, without degrading the overall function of the reservoir cap. With the IC and IP, only an additional return capacitor need be inserted for system operation. 

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Figure 1 • Computer MotherBoard. CurrentRF saves Power at the System, PCB and IC Levels of Integration.


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Figure 2 • Overlap Current in CMOS Logic -- The Source of Dynamic Power Dissipation.

CC-100 IC and IP

The technology versions of the IC, reference design, and IP Cell, shown in Figures 4 and 5, are intended to replace existing system, PCB, and on-chip reservoir and decoupling capacitors. To use this technology, simply depopulate a decoupling capacitor and insert the reference design into a given system. In the PCB case, the back of the board is unmasked ground plane, allowing the PCB reference design to perform in a similar fashion to what one would obtain with the reference design integrated into a PCB.  In the IP case, the circuits are embedded in the on chip DCAP, the use of this cell being very similar to the way one would use a standard on-chip DCAP. In both the IC and IP cases,  the use of this reference design and IP has the advantages of better filtering (lower supply line noise), power reduction (up to 25%) and endpoint cyber security enhancement (denying hackers the very frequencies they seek for system access).  

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Figure 3 • CC-100 Block Diagram.


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Figure 4 • CC-100 IC and Reference Design.


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Figure 5 • CC-100 Power Optimizer IP Cell.

The bestexplanation of the mechanisms and feature benefits of the CurrentRF technology, in all its formats, can best be described in the plots and data contained in Figure 6 and 7, and 10 through 14. In essence, a logic block is utilizing DC power, chopping and spreading this energy across certain frequency bands, as a result of the action of the system logic. The CurrentRF technology captures these frequencies and converts them back into DC power, aiding in cyber security, through a patented process. 

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Figure 6 • PCB Power Plane Spectrum -- CC-100 Disengaged.

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Figure 7 • PCB Power Plane Spectrum - CC-100 Engaged.


In Figure 6, one can observe two overlaid spectral plots of the circled power plane inputs of the CC-100 reference design (the “Vplus Shorting Bar” shown in figure 4). The green plot is the power plane spectrum with the CC-100 IC disengaged, the return cap (seen in Figure 3) opened. This disengaged condition is accomplished via a jumper on the reference design. The 3.19mA current measured is the result of the dynamic current draw of the 10, .18um BIST logic gates inside the CC-100. Even though the clock rate is 23MHz on this board, much high frequency energy and power is shown in the captured spectrum. The peak-to-peak magnitude of the supply noise is approximately 50 mV pp.  

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Figure 8 • CC-100 Reference Design packaged in a USB 3 Connector.

In Figure 7, the CC-100 reference design jumper is engaged and the blue spectral plot shows the magnitude reduction, and in some cases, the practical elimination, of spectral energy on the power plane. The 2.65mA current measured is the result of the dynamic current draw of the 10, .18um BIST logic gates, modified by the engaged CC-100, resulting in a reduction of .5mA or a 17% reduction in dynamic current. Even though the clock rate is 23MHz on this board, much high frequency energy is shown to be suppressed or eliminated in the spectrum. The peak-to-peak magnitude of the supply noise is reduced to approximately 20 mV pp.  

PowerStic and Exodus  

The CC-100 reference design PCB fits comfortably into the cavity of a standard USB2 or USB3 connector, as shown in Figure 8. This packaging option allows users to save power and money in finished systems such as servers, workstations, network equipment, etc., with the added benefit of endpoint cyber security. As can be seen in Figure 8, the CurrentRF technology only connects to the +5V and ground connections of the USB port, the data lines are completely open keeping any data the system is processing safe. 

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Figure 9 • PowerStic/Exodus Block Diagram.

Since some POS register systems only have one USB port, that port usually dedicated to an external peripheral such as a printer, the USB connector below can be completed with a cable retrofit, enabling a smart, cyber safe, energy-saving cable. 

The functional differences in the CC-100 IC/IP and PowerStic/Exodus devices are shown in Figure 9. The caps (represented by C4 in the Figure 9 block diagram) used on USB ports are of such poor Q (Quality Factor) at high frequencies, it is as if they are not even there. The module inside the PowerStic and Exodus devices has such high Q, that at high frequencies, practically all the high frequency energy is shunted to the CC-100 inputs, and away from the standard bypass caps used on USB +5V lines. So, just plugging the devices into the port is enough to harvest and feedback a substantial portion of high frequency noise, thus power and utility bill reduction, and cyber security enhancement.

As was discussed earlier with the CurrentRF CC-100 chip and IP, a computer, server, workstation, or network device utilize DC power, chopping and spreading this energy across certain frequency bands, as a result of the action of the system logic and devices. The CurrentRF technology captures these frequencies and converts them back into DC power, aiding in cyber security with emissions reduction, through a patented process.

In Figure 10, one can observe a spectral plot of power plane of the CC-100/PowerStic Demo board, the board and meter shown in the picture at the top of the spectral plot. The demonstration board utilizes 36 parallel Linear Feedback Shift Registers (LSFRs) as a cyclical logic stimulus engine. The total power of this demonstration module is about one fifth of a Supermicro server. 

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Figure 10 • CC-100/PowerStic Demo Board Spectrum -- PowerStic Extracted.

The green plot is the power plane spectrum measurement, with the PowerStic extracted from the onboard USB port. In this extracted condition, the board shows high density wideband energy, ranging from a few MHz to 3.3GHz. The DC current measured with as the result of the dynamic current draw by the 36 parallel LSFRs, is 210mA. Even though the clock rate is 23MHz on this board, much high frequency energy is shown in the spectrum. 

In Figure 11, the PowerStic is inserted and the spectral plot shows high frequency magnitude reduction, and in some cases, the practical elimination of spectral energy on the demonstration board power plane. The DC current measured, as the result of the dynamic current draw of the demonstration board LSFRs, with the PowerStic inserted, is 202mA, a reduction of 8mA or a 5% overall reduction in dynamic current. Even though the clock rate is 23MHz on this board, much high frequency energy is shown to be suppressed or eliminated in the spectrum. The spectral plot also shows the 400Mhz to 3.3GHz band substantially reduced, the very band that system hackers target to gain cypher keys for password reconstruction. In this manner, the PowerStic and Exodus devices aid in endpoint cyber security by reducing computer emissions.    

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Figure 11 • CC-100/PowerStic Demo Board Spectrum -- PowerStic Inserted.

Figures 12 and 13 show the actual power (dBm) and current(A) saved using the PowerStic and Exodus devices. The current saved in Figure 13 roughly matches the total 8mA to 10mA reduction shown on the Figure 10 and 11 plots above. Much of the power and current savings are shown to occur in the 200MHz to  3.3GHz bands as can be seen in the Figure 14 plot, confirming that the PowerStic and Exodus devices block and reduce the very frequencies hackers are using to gain access to computers and network systems via RF noise emissions.    

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Figure 12. PowerStic Extracted -- Inserted Power Difference.

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Figure 13 • PowerStic Extracted - Inserted Current Difference.


CurrentRF technology saves power and energy by harvesting and recycling current mode high frequency noise shunted to ground, away from system supply lines, reducing network systems power draw and suppressing RF noise emissions. In this manner, endpoint side channel hacker attacks are reduced, making systems safer and more secure. Due to the energy harvesting nature of these devices and techniques, and the power they save, TCO is reduced in systems, and the devices can pay for themselves in a 3 to 10 month time period. Thus, a form of cyber security is obtained for free after the device ROI point is reached, due to the inherent energy harvesting and power reduction characteristics of this technology.

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Figure 14 • CC-100 Disengaged vs Engaged Power Difference - Cyber Security Enhanced.

About the Author     

1608 HFE SavingPowerMoney 15Michael Hopkins is the founder and CEO of CurrentRF, a California-based research company founded in 2002. Through activities with CurrentRF, Michael developed the RFDAC methodology and Current Reuse Mixer (the CRF2101) in 2002, and more recently, the PowerOptimizer (PowerOp) methodologies and technologies the company is currently marketing.  

Michael is also an RF/Analog IC design engineer with 17 years of RFIC and Mixed Signal/Analog design experience with companies such as Analog De

vices, Northrop Grumman, Intersil, Teledyne Scientific, and Cypress Semiconductor (Amplifiers, DACs, ADCs, Mixers, Switch Mode Regulators, High Efficiency Charge Pumps, DLLs/PLLs, Energy Harvesting Circuits, etc.). His unique, broad experience across the Communications, Analog/Mixed Signal, RF, Power Management, and Energy Harvesting disciplines in the semiconductor industry has enabled the latest CurrentRF development, the CC-100 IC and IP PowerOptimizer (PowerOp) and its derivative products.

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