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Navigating LNA Microwave Integrated Circuits

Parent Category: 2018 HFE

By Peter McNeil

Low Noise Amplifiers (LNAs) are among the fundamental building blocks of wireless communications systems, along with power amplifiers (PA), oscillators, and mixers. These components serve as the medium that takes a received signal and amplifies it with a sufficient amount of gain while adding minimal noise. This typically occurs before mixing the signal with a local oscillator (LO) and converting it to analog baseband for signal processing to occur.

From semiconductor substrate type, to integrated circuit implementation (i.e.: MMIC or MIC), to the packaging, the specific function of the LNA along with the scenario it is applied in, allow for a fairly wide array of LNA design combinations. This article attempts to navigate through some of the current technologies used in various LNA architectures.

Brief Overview of LNA Parameters and Topologies

The LNA is used in the RF front-end receiver and is meant to amplify the received signal with adequate gain while maintaining a low noise figure (NF). The importance of these can be seen in Friis equation (below) for the cascading noise figure in a receiver chain:

FTotal=F1+F2-1G1+F3-1G1G2+F4-1G1G2G3

Where F1, F2, and F3 are the noise factor for the first, second, and third component in the receiver signal chain. While G1 G2, and G3 are the gain for the first, second, and third component in the receiver signal chain.

There are several design considerations that are made apparent with this equation. Namely, that the noise factor of the first component accounts for the bulk of the noise factor for the receiver and, finally, that the gain of the first component can rapidly deteriorate the noise factor down the chain if it is sufficiently high. Oftentimes, the LNA is the first or second component and―as stated earlier―it important that the noise factor of this component remains low with as high amount of gain as possible. The noise factor of the receiver is directly correlated to its signal-to-noise ratio (SNR) which is, in turn, related to the critical parameter of bit error rate (BER) of the receiver. There are also other parameters that are important including bandwidth, linearity (IP3), power consumption, and impedance matching.

Noise figure is just the noise factor (F) expressed in decibels (dB) where the noise factor is a ratio of signal-to-noise ratio (SNR) at the input and output of a device. NF can consist of a number of different types of noise including shot noise, thermal noise, and flicker noise. The gain is the ratio of the output power to the input power in dB. There is always a tradeoff between gain and NF for an LNA.

The input and output of the LNA must also be matched with a matching network from source to the load to minimize any reflections and loss of signal through the LNA. This means that the input must be matched to the antenna while the output is matched to the demodulation circuit so maximum power transfer can occur. External passive components such as inductors are also necessary for biasing but are kept to a minimum due to their size and cost.

There are several transistor LNA configurations including single-transistor common-source, cascode common-source, and a common-gate amplifier. The cascode configuration facilitates independent matching networks at the input and output with the setback of a reduced linearity. The single-transistor topologies are more ideal for low power applications. Common-gate topologies have the significant downside of a noise figure that grows with frequency and are therefore more ideal for low frequency applications. The cascode topology is often employed due it its robustness in terms of noise figure, gain, stability, and linearity. These transistor configurations can all be employed in stages to meet gain requirements with the trade-off of a marginally higher noise figure.

Transistor Geometries and Substrates

There are two main high frequency transistors employed for LNAs: GaAs pHEMT and SiGe BiCMOS HBT. These are relatively new transistor topologies that are a result of recent advancements in bandgap engineering. For some background, there are a number of substrates that can be utilized for high frequency components including Gallium Arsenide (GaAs), Silicon Germanium (SiGe), Gallium Nitride (GaN), and Indium Phosphide (InP). Table 1 lists some properties of these materials.

1811 LNAs tb01

Table 1 •  A Comparison of High Frequency Semiconductors.

While GaN lists high (H) on practically all the parameters in the table, it is not necessary for the ideal functionality of an LNA. In terms of cost, the GaAs and SiGe substrates are best with moderate to high, high frequency performance. There are GaN LNAs that are implemented for their resistance to high incident powers, potentially eliminating the need for a protective circulator before the LNA. The InP substrate has the highest electron mobility is most often used for extremely fast transistors in sub-millimeter applications. Still, the InP substrate is often the most expensive to implement and so is less often used than GaAs and Si-based substrates.

There have been several studies comparing the GaAs pseudomorphic High Electron Mobility Transistors (pHEMT) and SiGe BiCMOS Heterojunction Bipolar Transistors (HBT) for LNA applications. The general consensus is that the GaAs pHEMT LNA and SiGe BiCMOS LNA has comparable performance in terms of linearity but the pHEMT technology exhibits a lower NF. Still, the SiGe BiCMOS offers a much higher gain with relatively low current consumption whereas the pHEMT requires a much higher current consumption for the same level of gain. Moreover, the silicon-based technology is generally more cost-effective. The GaAs pHEMT LNA is therefore more often leveraged for its low noise figure and broadband performance while the SiGe BiCMOS LNA can be used for its ideal narrow-band characteristics.

LNA: MMIC or HMIC

LNAs can be implemented as either monolithic microwave integrated circuits (MMIC) or Hybrid Microwave Integrated Circuits (HMIC). A MMIC allows for the integration of passive devices (e.g.: attenuator, coupler, filter, etc. ) and active devices (e.g.: oscillator, mixer, amplifier, etc.) as well as their connected transmission lines to be grown in situ on one planar substrate such as a silicon wafer. The main benefit of MMICs is their cost-effectiveness for somewhat generic, volume production circuits with the added benefit of a very small dimensions (1 mm² to 10 mm²). The fabrication of MMICs becomes cost-prohibitive at smaller scales where the time it takes to design, simulate, fabricate, test, debug, and repeat is not justifiable. Many LNAs are manufactured this way and are sold as either as bare dies, or, in Quad Flat No-leads (QFN) packaging. It should be noted that LNA parameters such as gain and NF will degrade from die to packaging.

For more complex circuits Hybrid Microwave Integrated Circuits (HMICs) are often employed where the hybrid integration can be realized using various types of materials and manufacturing processes combined on a single package. This is generally accomplished by attaching highly optimized ICs on a low-loss dielectric substrate, as shown in Figure 1, the term HMIC typically means one of three substrates/processes are employed: PCBs, thick-film, or thin-film. Printed circuit boards will often leverage the FR4 material with supplemental laminates that exhibit low dielectric constants for circuits up to 4 GHz while PTFE (Teflon) and Rogers substrates can be used for higher frequencies. PCBs have the benefit of accessibility on a macro scale―components from a variety of vendors can be put together and a circuit can be prototyped rapidly with low cost and a quick turnaround time.

1811 LNAs fg01

Figure 1 • HMICs could involve the use of a PCB, thick-film substrate, or a thin-film substrate (left to right) [3].

The thick-film process includes printing circuits by pushing a conductive epoxy through a patterned screen on a ceramic substrate that is often 95% pure alumina. High precision conductors are around 25 µm in trace width as opposed to the 15 µm average for thin film processes. A thin-film process will generally involve a higher purity of alumina (99%) and, as opposed to the additive thick-film process, a photolithographic, subtractive process is leveraged for thin-film technologies.

The chemical etching technique in the thin-film process allows for much thinner achievable trace widths and ultimately smaller dimensions. While the large trace thickness of PCBs and thick-film technologies are not relevant at the microwave frequencies, they are not a practical option up to the millimeter-wave frequencies. Furthermore, since line impedance is a function of thickness and space to ground, HMICs are more often employed through thin-film technologies as it enables more flexibility in line width in a scenario where an engineer has a preset requirement for space to ground.

A Variety of LNA Implementations

Depending on the transistor topology used, most LNAs will require the use of biasing circuitry to avoid damaging the device. For both p-channel and n-channel FETs, for instance, current will flow from drain to source when the gate voltage is set at 0V. In these cases, the gate voltage must be applied before the drain voltage to prevent transistor damage. A bias sequencing circuit allows for the proper pinch-off voltage to be applied to the gate before applying voltage to the drain, then finally adjusts the gate voltage before turning on the RF signal. For a MMIC-based LNA, the bias circuitry is often implemented external to the die. This implementation is invariably some form of a HMIC which can be as follows:

  • Integrated into a thin-film process
  • In a chip-and-wire topology with MMIC-based LNA wedge-bonded to thin-film ceramic boards
  • In a flip chip attachment onto a ceramic (thin-film) substrate
  • MMIC packaged as a SMD component and soldered onto substrate

In the chip-and-wire topology, a LNA MMIC is wedge bonded to custom thin-film alumina boards with biasing circuitry. The LNA MMIC can also be attached in a flip chip style (Figure 2) where the die itself incorporates an array of metal bumps that is then soldered onto the ceramic board. This way, the chip-to-substrate transition is minimized allowing for better RF and mm-wave performance. The MMIC itself can also be packaged to be handled like any SMD component for simpler manufacturability. The main setback of this approach comes from the performance degradation due to packaging, there is also a limit on thermal dissipation as the die cannot be mounted directly on a ground plane (this is not a major concern for LNAs). Integrated thin-film LNAs have the benefit of including the respective biasing circuitry as well as simplified packaging without the parasitics of wire bonds but they are limited in frequency and customizability.

1811 LNAs fg02

Figure 2 • Chip-and-wire interconnections utilize bare dies often from a variety of vendors along with thin-film boards for interconnect in metal casing. Flip chip topologies uses an array of metal connections on the chip to solder to the substrate. [2]

These variations can also be applied at the, larger, receiver front-end level where there is a trend towards higher integration. For instance, a SoC can integrate an entire RF transceiver with digital, analog, and RF blocks on a single die—granted, these are for low powered, microwave applications.

Receiver Implementation: MCM, SiP, or SoC?

From the systems perspective, the LNA is obviously not an isolated element but instead a component in a chain of other components. Therefore, design, fabrication, and packaging at the transistor level to the systems level must be considered. Whether the receiver is being implemented in cellular-based user equipment, a radar transponder, a satellite ground terminal, or a base station, the design constraints and thus packaging vary. Many receivers are implemented as multi-chip modules (MCM) as it allows for flexibility in sub-components and assembly. Integrating an entire system on a chip (SoC) is limited in choice of substrate and is thus severely limited in frequency range as well as power handling. There is also the perspective that more integrated the device, the more specialized the function of the IC which can be a risky inflexibility as technology evolves.

Conclusion

From transistor geometries and design layouts to hardware implementation and packaging, there are many variables to consider in the making of an LNA. Many LNAs have a cascode topology and are fabricated as either GaAs pHEMTs or SiGe BiCMOS HBTs. These MMICs are then implemented in a HMIC layout with custom, thin-film boards. At this level, the packaging can vary where many HMICs are either chip-and-wire or flip chip. Packaged MMICs can also be used as SMD components for more modular manufacturing but have a degraded gain and noise figure.

About the Author

Peter McNeil serves as marketing manager for Fairview Microwave.

References

1. Božanić Mladen, and S. Sinha. Millimeter-Wave Low Noise Amplifiers. Springer, 2018.

2. http://mantravlsi.blogspot.com/2014/10/flip-chip-and-wire-bonding.html

3. http://www.informit.com/articles/article.aspx?p=2354942

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